EC6601 VLSI Syllabus, VLSI DESIGN Syllabus – ECE 6th SEM Anna University

EC6601  VLSI Syllabus

Anna University Regulation 2013 Electronic Communications Engineering (ECE) EC6601  VLSI Important Questions for all 5 units are provided below. Download link for ECE 6th SEM EC6601  VLSI DESIGN  Answer Key is listed down for students to make perfect utilization and score maximum marks with our study materials.

Anna University Regulation 2013 Electronic Communications Engineering (ECE)

6th SEM EC6601  CA-VLSI DESIGN  Syllabus

EC6601      VLSI DESIGN      L T P C 3 0 0 3

OBJECTIVES:

  •  In this course, the MOS circuit realization of the various building blocks that is common to any microprocessor or digital VLSI circuit is studied.
  •  Architectural choices and performance tradeoffs involved in designing and realizing the circuits in CMOS technology are discussed.
  •  The main focus in this course is on the transistor circuit level design and realization for digital operation and the issues involved as well as the topics covered are quite distinct from those encountered in courses on CMOS Analog IC design.UNIT I MOS TRANSISTOR PRINCIPLE 9

    NMOS and PMOS transistors, Process parameters for MOS and CMOS, Electrical properties of CMOS circuits and device modeling, Scaling principles and fundamental limits, CMOS inverter scaling, propagation delays, Stick diagram, Layout diagrams

    UNIT II COMBINATIONAL LOGIC CIRCUITS 9

    Examples of Combinational Logic Design, Elmore‟s constant, Pass transistor Logic, Transmission gates, static and dynamic CMOS design, Power dissipation – Low power design principles

    UNIT III SEQUENTIAL LOGIC CIRCUITS 9

    Static and Dynamic Latches and Registers, Timing issues, pipelines, clock strategies, Memory architecture and memory control circuits, Low power memory circuits, Synchronous and Asynchronous design

    UNIT IV DESIGNING ARITHMETIC BUILDING BLOCKS 9

    Data path circuits, Architectures for ripple carry adders, carry look ahead adders, High speed adders, accumulators, Multipliers, dividers, Barrel shifters, speed and area tradeoff

    UNIT V IMPLEMENTATION STRATEGIES 9

    Full custom and Semi custom design, Standard cell design and cell libraries, FPGA building block architectures, FPGA interconnect routing procedures.

    TOTAL: 45 PERIODS

OUTCOMES:
Upon completion of the course, students should

  •  Explain the basic CMOS circuits and the CMOS process technology.
  •  Discuss the techniques of chip design using programmable devices.
  •  Model the digital system using Hardware Description Language.TEXTBOOKS:

    1. Jan Rabaey, Anantha Chandrakasan, B.Nikolic, “Digital Integrated Circuits: A Design Perspective”, Second Edition, Prentice Hall of India, 2003.

    2. M.J. Smith, “Application Specific Integrated Circuits”, Addisson Wesley, 1997

    REFERENCES:

    1. N.Weste, K.Eshraghian, “Principles of CMOS VLSI Design”, Second Edition, Addision Wesley 1993

    2. R.Jacob Baker, Harry W.LI., David E.Boyee, “CMOS Circuit Design, Layout and Simulation”, Prentice Hall of India 2005

    3. A.Pucknell, Kamran Eshraghian, “BASIC VLSI Design”, Third Edition, Prentice Hall of India, 2007.

If you require any other notes/study materials, you can comment in the below section.

Related Links

For EC6601  VLSI Previous Year Question Papers – Click here

For EC6601  VLSI Question Bank/2marks 16marks with answers – Click here

For EC6601  VLSI Important Questions/Answer Key – Click here

For EC6601  VLSI Lecture Notes – Click here

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EC6601  Syllabus, VLSI Unit wise Syllabus – ECE 6th Semester

 

 

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