EE8351 DLC Syllabus
Anna University Regulation 2017 EIE EE8351 DLC Syllabus for all 5 units are provided below. Download link for EIE 3rd Sem EE8351 DIGITAL LOGIC CIRCUITS Engineering Syllabus is listed down for students to make perfect utilization and score maximum marks with our study materials.
Anna University Regulation 2017 EIE Engineering (EIE) 3rd Sem EE8351 DIGITAL LOGIC CIRCUITS Engineering Syllabus
EE8351 DIGITAL LOGIC CIRCUITS
To study various number systems and simplify the logical expresions using Bolean
To study combinational circuits
To design various synchronous and asynchronous circuits. To introduce asynchronous sequential circuits and PLDs
To introduce digital simulation for development of aplication oriented logic circuits.
UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES
Review of number systems, binary codes, eror detection and corection codes (Parity and
Hamming code) – Digital Logic Familes -comparison of RTL, DTL, TTL, ECL and MOS
familes -operation, characteristics of digital ogic family.
UNIT II COMBINATIONAL CIRCUITS
Combinational logic – representation of logic functions-SOP and POS forms, K-map
representations – minimization using K maps – simplifcation and implementation of
combinational ogic – multiplexers and de multiplexers – code converters, aders, subtractors,
Encoders and Decoders.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Sequential ogic- SR, JK, D and T flip flops – level trigering and edge trigering – counters – asynchronous and synchronous type – Modulo counters – Shift registers – design of
synchronous sequential circuits – More and Melay models- Counters, state diagram; state
reduction; state asignment.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABILITY LOGIC DEVICES
Asynchronous sequential ogic circuits-Transiton tabilty, flow tabilty-race conditons, hazards
&erors in digital circuits; analysis of asynchronous sequential logic circuits-introduction to
Programmabilty Logic Devices: PROM – PLA –PAL, CPLD-FPGA.
UNIT V VHDL
RTL Design – combinational ogic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: aders, counters, flip flops,
Multiplexers & De multiplexers).
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EE8351 DLC Syllabus
Anna University 3rd Sem EIE DLC Syllabus
EE8351 DIGITAL LOGIC CIRCUITS Engineering Syllabus free download
Anna University EIE DLC Syllabus Regulation 2017
EE8351 Syllabus, DLC Unit wise Syllabus – EIE 3rd Semester