CS6303 CA Syllabus
Anna University Regulation 2013 Electronic Communications Engineering (ECE) CS6303 CA Important Questions for all 5 units are provided below. Download link for ECE 6th SEM CS6303 COMPUTER ARCHITECTURE Answer Key is listed down for students to make perfect utilization and score maximum marks with our study materials.
Anna University Regulation 2013 Electronic Communications Engineering (ECE) 6th
6th SEM CS6303 CA-COMPUTER ARCHITECTURE Syllabus
CA-COMPUTER ARCHITECTURE Syllabus
- To make students understand the basic structure and operation of digital computer.
- To understand the hardware-software interface.
- To familiarize the students with arithmetic and logic unit and implementation of fixed point andfloating-point arithmetic operations.
- To expose the students to the concept of pipelining.
- To familiarize the students with hierarchical memory system including cache memories andvirtual memory.
- To expose the students with different ways of communicating with I/O devices and standard I/Ointerfaces.
UNIT I OVERVIEW & INSTRUCTIONS 9
Eight ideas – Components of a computer system – Technology – Performance – Power wall – Uniprocessors to multiprocessors; Instructions – operations and operands – representing instructions – Logical operations – control operations – Addressing and addressing modes.
UNIT II ARITHMETIC OPERATIONS 7
ALU – Addition and subtraction – Multiplication – Division – Floating Point operations – Subword parallelism.
UNIT III PROCESSOR AND CONTROL UNIT 11
Basic MIPS implementation – Building datapath – Control Implementation scheme – Pipelining – Pipelined datapath and control – Handling Data hazards & Control hazards – Exceptions.
UNIT IV PARALLELISM 9
Instruction-level-parallelism – Parallel processing challenges – Flynn’s classification – Hardware multithreading – Multicore processors
UNIT V MEMORY AND I/O SYSTEMS 9
Memory hierarchy – Memory technologies – Cache basics – Measuring and improving cache performance – Virtual memory, TLBs – Input/output system, programmed I/O, DMA and interrupts, I/O processors.
At the end of the course, the student should be able to:
Design arithmetic and logic unit.
Design and anlayse pipelined control units Evaluate performance of memory systems.
1. David A. Patterson and John L. Hennessey, “Computer Organization and Design‟, Fifth edition, Morgan Kauffman / Elsevier, 2014.
2. William Stallings “Computer Organization and Architecture”, Seventh Edition , Pearson Education, 2006.
3. Vincent P. Heuring, Harry F. Jordan, “Computer System Architecture”, Second Edition, Pearson Education, 2005.
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Anna University 6th SEM ECE CA Syllabus
CS6303 COMPUTER ARCHITECTURE Syllabus free download
Anna University ECE CA Syllabus Regulation 2013
CS6303 Syllabus, CA Unit wise Syllabus – ECE 6th Semester