CS8351 DPSD Syllabus, Digital Principles & System Design Syllabus – 3rd SEM Reg 2017

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CS8351 DPSD Syllabus

Anna University Regulation 2017 IT CS8351 DPSD Syllabus for all 5 units are provided below. Download link for IT 3rd SEM CS8351 Digital Principles & System Design Engineering Syllabus is listed down for students to make perfect utilization and score maximum marks with our study materials.

Anna University Regulation 2017 Information Technology (IT) 3rd SEM CS8351 DPSD – Digital Principles & System Design Engineering Syllabus

CS8351 DIGITAL PRINCIPLES AND SYSTEM DESIGN L T P C 4 0 0 4

OBJECTIVES:

• To design digital circuits using simplified Boolean functions

• To analyze and design combinational circuits

• To analyze and design synchronous and asynchronous sequential circuits

• To understand Programmable Logic Devices

• To write HDL code for combinational and sequential circuits

UNIT I BOOLEAN ALGEBRA AND LOGIC GATES 12

Number Systems – Arithmetic Operations – Binary Codes- Boolean Algebra and Logic Gates – Theorems and Properties of Boolean Algebra – Boolean Functions – Canonical and Standard Forms – Simplification of Boolean Functions using Karnaugh Map – Logic Gates – NAND and NOR Implementations.

UNIT II COMBINATIONAL LOGIC 12

Combinational Circuits – Analysis and Design Procedures – Binary Adder-Subtractor – Decimal Adder – Binary Multiplier – Magnitude Comparator – Decoders – Encoders – Multiplexers – Introduction to HDL – HDL Models of Combinational circuits.

UNIT III SYNCHRONOUS SEQUENTIAL LOGIC 12

Sequential Circuits – Storage Elements: Latches , Flip-Flops – Analysis of Clocked Sequential Circuits – State Reduction and Assignment – Design Procedure – Registers and Counters – HDL Models of Sequential Circuits.

UNIT IV ASYNCHRONOUS SEQUENTIAL LOGIC 12

Analysis and Design of Asynchronous Sequential Circuits – Reduction of State and Flow Tables – Race-free State Assignment – Hazards.

UNIT V MEMORY AND PROGRAMMABLE LOGIC 12

RAM – Memory Decoding – Error Detection and Correction – ROM – Programmable Logic Array – Programmable Array Logic – Sequential Programmable Devices. TOTAL : 60 PERIODS

OUTCOMES:

On Completion of the course, the students should be able to:

 Simplify Boolean functions using KMap

 Design and Analyze Combinational and Sequential Circuits

 Implement designs using Programmable Logic Devices

 Write HDL code for combinational and Sequential Circuits

TEXT BOOK:

1. M. Morris R. Mano, Michael D. Ciletti, ―Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog‖, 6th Edition, Pearson Education, 2017.

REFERENCES

1. G. K. Kharate, Digital Electronics, Oxford University Press, 2010

2. John F. Wakerly, Digital Design Principles and Practices, Fifth Edition, Pearson Education, 2017.

3. Charles H. Roth Jr, Larry L. Kinney, Fundamentals of Logic Design, Sixth Edition, CENGAGE Learning, 2013

4. Donald D. Givone, Digital Principles and Design‖, Tata Mc Graw Hill, 2003.

If you require any other notes/study materials, you can comment in the below section.

For Syllabus in PDF format – Click Here

Related Links

For CS8351 DPSD Previous Year Question Papers – Click here

For CS8351 DPSD Question Bank/2marks 16marks with answers – Click here

For CS8351 DPSD Important Questions/Answer Key – Click here

For CS8351 DPSD Lecture Handwritten Notes – Click here

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