Anna University Regulation 2013 Electronics and Communication Engineering (ECE) EC6304 EC 1 2marks & 16marks for all 5 units are provided below. Download link for ECE 3rd SEM EC6304 Electronic Circuits 1 Short answers, Question Bank are listed down for students to make perfect utilization and score maximum marks with our study materials.
1. Define – Stability Factor
2. Compare bias stabilization and compensation techniques
3. What is the condition for thermal stability?
4. What are the different methods of biasing JFET?
5. What are the types of transistor biasing?
6. Draw the single stage self biased circuit using pnp transistor.
7. List the advantages of self bias.
8. Draw the fixed bias and the self bias circuits.
9. What is the need for biasing in transistor amplifier?
10.What is reverse saturation current?
11.Why is capacitive coupling used to connect a signal source to an amplifier?
12.Calculate the value of feedback resistor (Rs) required to self bias an N-channel JFET with IDSS=40mA, VP = -10V and VGSQ = -5V.
13.What is DC load line? How is Q point plotted on the DC load line?
PART – B
1. Explain fixed biasing in BJT and FET. Explain the procedure for locating operating point on the characteristic curves.(16)
2. Explain the fixed bias method and derive an expression for the stability factor.(8)
3. The following circuit has VCC = 20V, RC = 2KΩ , β = 50, VBE = 0.2V, R1 = 100KΩ, RE = 100Ω. Calculate IB, VCE, IC and the Stability Factor S. (16)
4. Draw a voltage divider bias BJT network. Derive expressions for ICQ and VCEQ and describe the method of drawing the dc load line on the output characteristics of transistor. (16)
5. Explain the voltage divider bias method and derive an expression for the stability factor. (8)
6. For the following circuit find the Q-point if VCC = 15V and β = 100; VBE = 0.7V. (10) .
7. A silicon transistor with β = 49 is used in self bias arrangement with VCC = 5V, RE = 1Kohms and IE = 1mA. Find the values of R1 and R2 such that the stability factor does not exceed 5. (10)
8. In an N-channel JFET, biased by potential divider method, the operating point has to be at IDSS = 12mA. If VDD = 12V, R1 = 20K Ω and R2 = 10K Ω, RD =1.2K Ω and VP= -4V. Find the values of ID, VGS, VG, VDS and VS. (16)
9. Calculate the operating point for the following circuit.(6)
10. For the following circuit calculate VCE and IC, where β = 100 for the silicon transistor.
11. Derive the expression of stability factor for collector feedback amplifier. (10)
12. Explain the circuit that uses a diode to compensate the changes in VBE and in ICO.(12)
13. Explain the operation of thermistor compensation. (4)
14. Explain the various techniques of stabilization of Q-point in a transistor. (16) .
15. Explain the factors on which an amplifier needs to be stabilized.(6)
16. With the help of neat diagram, explain the methods used in biasing the FET and MOSFET. (16)
(i) Define – Stability Factor. (2)
(ii) The pnp transistor in the following circuit has β = 50. Find the values of RC to obtain Vc = 5V. What happens if the transistor is replaced with another transistor β = 100? (14)
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Anna University 3rd SEM ECE EC 1 2marks 16 marks
EC6304 Electronic Circuits 1 question bank free download
Anna University ECE EC 1 short answers Regulation 2013
EC6304 2marks, EC 1 Unit wise short answers – ECE 3rd Semester