EC8392 DE Syllabus
Anna University Regulation 2017 EC8392 DE Syllabus for all 5 units are provided below. Download link for 3rd SEM EC8392 Digital Electronics Syllabus is listed down for students to make perfect utilization and score maximum marks with our study materials.
Anna University Regulation 2017 (ECE) 3rd SEM EC8392 DE – Digital Electronics Engineering Syllabus
EC8392 DIGITAL ELECTRONICS L T P C 3 0 0 3
OBJECTIVES:
To present the Digital fundamentals, Boolean algebra and its applications in digital systems
To familiarize with the design of various combinational digital circuits using logic gates
To introduce the analysis and design procedures for synchronous and asynchronous sequential circuits
To explain the various semiconductor memories and related technology
To introduce the electronic circuits involved in the making of logic gates
UNIT I DIGITAL FUNDAMENTALS 9
Number Systems – Decimal, Binary, Octal, Hexadecimal, 1‘s and 2‘s complements, Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms, Karnaugh map Minimization and Quine-McCluskey method of minimization.
UNIT II COMBINATIONAL CIRCUIT DESIGN 9
Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder – Carry look ahead Adder,
BCD Adder, Multiplexer, Demultiplexer, Magnitude Comparator, Decoder, Encoder, Priority Encoder.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS 9
Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis and
design of clocked sequential circuits – Design – Moore/Mealy models, state minimization, state assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift registers, Universal Shift Register.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS 9
Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits.
UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS 9
Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic RAM – Programmable Logic Devices – Programmable Logic Array (PLA) – Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) – Implementation of combinational logic circuits using PLA, PAL.
Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fan-in, noise
margin, logic families and their characteristics-RTL, TTL, ECL, CMOS
TOTAL:45 PERIODS
OUTCOMES:
At the end of the course:
Use digital electronics in the present contemporary world
Design various combinational digital circuits using logic gates
Do the analysis and design procedures for synchronous and asynchronous sequential circuits
Use the semiconductor memories and related technology
Use electronic circuits involved in the design of logic gates
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EC8392 Syllabus, DE Unit wise Syllabus – 3rd Semester