## EE6301 DLC Notes

Anna University Regulation 2013 EEE EE6301 DLC Notes, Digital Logic Circuits Lecture Handwritten Notes for all 5 units are provided below. Download link for EEE 3rd SEM EE6301 Digital Logic Circuits Lecture Handwritten Notes are listed down for students to make perfect utilization and score maximum marks with our study materials.

EE6301 DIGITAL LOGIC CIRCUITS

UNIT-I NUMBERING SYSTEMS AND DIGITAL LOGIC FAMILIES

1) What are basic properties of Boolean algebra?

The basic properties of Boolean algebra are commutative property, associative Property and distributive property.

2) State the associative property of boolean algebra.

The associative property of Boolean algebra states that the OR ing of several variables results in the same regardless of the grouping of the variables. The associative property is stated as follows: A+ (B+C) = (A+B) +C

3) State the commutative property of Boolean algebra.

The commutative property states that the order in which the variables are OR ed makes no difference. The commutative property is: A+B=B+A

4) State the distributive property of Boolean algebra.

The distributive property states that AND ing several variables and OR ing the result With a single variable is equivalent to OR ing the single variable with each of the the several Variables and then AND ing the sums. The distributive property is: A+BC= (A+B) (A+C)

5) State the absorption law of Boolean algebra.

The absorption law of Boolean algebra is given by X+XY=X, X(X+Y) =X.

6) State De Morgan’s theorem.

De Morgan suggested two theorems that form important part of Boolean algebra. They are,

1) The complement of a product is equal to the sum of the complements. (AB)’ = A’ + B’

2) The complement of a sum term is equal to the product of the complements. (A + B)’ = A’B’

7) Reduce A (A + B)

A (A + B) = AA + AB= A (1 + B) [1 + B = 1]= A.

PART-B

1. Design a 4-bit binary adder/ subtractor circuit. a) Basic equations. (4) b) Comparison of equations. (4) c) Design using twos complement Circuit diagram. (8)

2. Design a half adder using NAND – NAND logic. (16)

3. Explain how a full adder can be built using two half adders. (16)

4. Design a half adder using at most three NOR gates. (16)

5. Using 8 to 1 multiplexer, realize the Boolean function T = f(w, x, y, z) = Σ(0,1,2,4,5,7,8,9,12,13) (16)

6. Design a 8421 to gray code converter. (16)

7. Draw the logic diagram of full subtractor and explain its operation. (16)

8. Draw the circuit diagram of NMOS NAND gate and explain its operation. (16)

9. a) Design a full adder circuit using only NOR gates. (4) b) Draw the circuit of a CMOS two inputs NAND gate (12)

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EE6301 DLC Notes

Anna University 3rd SEM EEE DLC Lecture Handwritten Notes